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Introduction

Methodology

By using the resistive thermal evaporation method, multilayer thin films, namely CdTe/CdSe and CdS (Cu)/ZnSe, are prepared. Figure 1 shows the experimental equipment that was used to fabricate thin films.

ITO-coated glass substrates were selected due to their transparency in light as well as conductivity to electricity. The glass substrates were subjected to a thorough cleansing process that involved ultrasonic treatment using a solvent solution and then rinsed using distilled water, and drying. Thin films were formed in an atmosphere of vacuum that is that was maintained at 10-5 mbar in order to warrant the absence of impurities. The film was heated to 150°C in order to increase the adhesion.

Selection of substrate, cleaning of substrate, preparation of multilayer thin film, and annealing of the deposited film are the four sequential processes in the process. We chose glass substrates and glass substrates covered with indium oxide (ITO) for our multilayer coating experiment. Cleaning the substrate thoroughly is the first step in the thin lm deposition process. The substrates are then treated with an alcohol-or liquid-cleaner solution-based fifteen-minute ultrasonic bath. They are then cleaned with distilled water and patted dry with optical tissue. Preventing the entry of contaminants onto the thin layer is the main goal of this rigorous cleaning process.

After the substrate was cleaned, it was placed, along with the designated material, in the substrate holder inside the vacuum chamber. The ingredients CdS: Cu and ZnSe were contained in two boats for the multilayer coating in the first experiment. CdSe and CdTe, two more materials, were added to the boats in the experiment that followed. Sublimation from tantalum boats was performed using the powders of ZnSe, CdS, CdSe, and CdTe, each having a purity of roughly 99.999%. Following the placement of the Bell Jar on the plate, a mica sheet was placed between the source and substrate. The rotary pump and diffusion pump were turned on in order to evacuate the vacuum chamber to 10-5 mbar while making sure that all air inlets and valves were closed and tight. After the chamber was sealed, the substrate holder was turned at a speed of about 80 revolutions per minute in order to enable the deposition of smooth thin films. To get rid of impurities and roughness, the substrate was warmed to 150 °C. Liquid nitrogen was poured into the liquid nitrogen trap to chill it and help condense the oil droplets and particles from the diffusion pump.

CdS (Cu) Layer Deposited at an average thickness of 258 nanometers after which it undergoes a five-minute process of annealing to 350 degrees Celsius. The temperature chosen was in light of previous research that suggested improved electrical properties by copper diffusion in CdS [32]. ZnSe Layer is deposited up to an nm thickness of 501 by together similar parameters, which ensures that the crystals are formed properly. CdTe and Layers CdSe the layers are deposited sequentially using CdTe at 56nm and CdSe at 28 nanometers. The resistive thermal evaporation process yields multilayer thin films with the following deposition characteristics. At first, boats were called with powdered CdS and Cu that was 99.999% pure. It was then decided to modify the thickness and density for CdS to 258 nm and 4.826 g/cm3, respectively. The following other settings were kept at room temperature: 25 cm; 120-200 A; 10 minutes; 0.1-0.2 nm/s; 10-5 mbar; substrate temperature; distance between substrate and target; current; deposition time; deposition rate; and vacuum. The data monitor received the copper density input, and the CdS deposition monitor was set up in accordance with the copper doping parameters. The handle was pointed in the direction of the copper-containing boat as the CdS deposition preceded, which caused copper (Cu) to be doped into the CdS film. Using the scorching point probe approach, one or two produced samples were doped with copper and then gold contacts were placed to measure the conductivity of CdS (Cu).

It was previously noted that CdS (Cu) thin film P-- type conductivity was examined. Testing later validated the CdS(Cu) thin film's P-type conductivity, which exactly matched results from previous literature investigations on P-type CdS(Cu) [33,34]. The robust evidence of P-type conductivity displayed by CdS (Cu) thin films was provided by the continuous agreement with previous research.

ZnSe was deposited on top of the CdS (Cu) layer more easily when the Cu layer was allowed to diffuse into the CdS layer during a 5-minute vacuum annealing process at 350°C. The handle of the device was then turned in the direction of the third boat that held ZnSe, with the thickness adjusted to 501 nm and the density of ZnSe set to 5.27 g/cm3. All other ZnSe deposition parameters were the same as for CdS (Cu) deposition, with the exception of the deposition period, which was increased to 15 minutes for ZnSe deposition. The rotary pump and lamp power were turned off when the deposition process was finished. To release the vacuum, the main isolation valve was closed and the air inlet valve was opened. The chamber was carefully opened and the substrate holder was removed after the appropriate amount of time. Gold contacts were used to connect the voltmeter and the heat source to one or two produced ZnSe samples on ITO-coated glass substrates in order to measure the conductivity of ZnSe using the hot point probe method. As per the extant literature, ZnSe possesses inherent N-type conductivity [35-37], which is verified by the conducted test. ZnSe was deposited on top of the CdS (Cu) thin film, creating a composite heterostructure PN-junction. Using gold contacts to examine the PN-junction features and diode characteristics helped to further validate this creation. Figure 2 shows the structure of the prepared composite.

The same process was repeated with different settings to achieve the deposition of CdTe/CdSe multilayers. We used glass substrates and indium oxide-coated glass substrates (ITO), cleaned with ultrasonic for ten to fifteen minutes, rinsed with water, and dried with optical tissue. Next, 99.99% pure CdTe and CdSe were placed into two molybdenum boats under a vacuum of 5×10-5 mbar. On the monitor screen, values of 6.2 g·cm-3 and 56 nm, respectively,were set for the bottom layer CdTe's density and thickness. The following additional parameters were kept at room temperature: 25 cm; 20–40 mA; 4 minutes and 44 seconds; 0.1–0.2–0.5–0.9; 1.0 nms^-1; and 10–5 mbar. The substrate temperature, target distance, current, deposition duration, deposition rate, and vacuum were all maintained at these values. After the first layer of CdSe was deposited, the thermal evaporation unit's handle was turned to deposit the second layer of CdSe. With the exception of the deposition rate and time, which were changed to 3 minutes and 14 seconds and 0.1–0.2 nms^-1, respectively, the parameters were the same as for the first layer. The film thickness was fixed at 28 nm, and the CdSe density was determined to be 5.816 g·cm^-3.

We used the hot point probing method to confirm the semiconducting properties of CdSe and CdTe after their deposition, in line with findings reported in the literature [25]. In the same way, we added a third layer of CdTe on top of CdSe to set up the monitor at 56 nm in thickness. For the third layer, 5 minutes and 0.1-0.7 nms^-1 were the deposition time and rate, respectively. It took 5 minutes and 25 seconds to install the fourth layer, which was 28 nm thick and had a deposition rate of 0.1-0.7 nms^-1. The fifth and sixth layers, which had thicknesses of 56 nm and 28 nm, were successfully deposited at a deposition rate of 0.1-0.7 nms^-1 in 5 minutes and 50 seconds and 4 minutes and 19 seconds, respectively. CdTe and CdSe both show p-type and n-type conductivity throughout the entire multilayer heterostructure [39]. Figure 3 shows the structure of the CdTe/CdSe multilayers that were deposited.

After the deposition step, we placed different kinds of masks on both multilayers and then put Ti/Au contacts on the P-N junction. There are two sorts of contacts: Ohmic contacts, which were found between conductors, and non-Ohmic contacts, which include heterostructure, breakdown junctions, PN junctions, Schottky barriers, and other structures. Within the thermal evaporation unit, metal deposition, annealing, and penetration were required for the application of titanium and gold contacts. For facilitating electrical characteristic assessments and IV curve investigations, a titanium contact measuring 51 nm in thickness at a current of 100A and gold contacts measuring 91nm in thickness were used for both front and rear contacts. Finally, annealing was done. Annealing is a heat-induced process that modifies multilayer characteristics like strength, resistivity, energy band gap, absorption, transmission, and refractive index. This process entails raising the material's temperature to its critical point, holding it there, and then describing it once it has cooled. Under particular atmospheric conditions, the annealing process was carried out in a box furnace (1200X).

The selection of annealing temperatures during this research (250 °C 300 °C as well as 400°C) was due to their crucial function in enhancing quality of crystals, the size and clarity and reduction of defects of II-VI semiconductor film materials like CdS, ZnSe, CdTe and CdSe. Annealing can enhance the optical and structural features of these films by encouraging the reorganization and reorganization that occurs in atoms, decreasing lattice defects and improving the grain boundaries and all of these contribute to improved performance of the film for optoelectronic systems. The temperature 250°C is usually chosen to allow the materials, particularly CdS to crystallize, while preserving their phase integrity without causing any significant degradation. Studies have demonstrated that the process of annealing CdS films with temperatures of around 250°C improves their crystal structure and prevents over-oxidation, which could cause degradation of their conductivity and transparency [40]. The 300°C at this intermediate temperature, CdTe as well as CdSe benefit from larger grain sizes, which increases the mobility of carriers and decreases the number of recombination centers. Research suggests that the annealing of CdTe films at around 300°C increases the growth of grain and increases overall uniformity of the film that is vital to increasing the efficiency of photovoltaics [41]. In addition, ZnSe annealing at 300°C allows for an optimal lattice alignment with other layers, while also reducing roughness of the surface [42].

After deposition, the samples were annealed in three temperatures: 250°C; 300°C and 400°C. The reason for choosing these temperatures involves:

250°C The temperature of this is ideal for encouraging crystallization of CdS and preventing excessive oxidation that can reduce conductivity.

300°C in this middle temperature, both CdTe and gain from larger size of grains, which improves the mobility of carriers and decreases Recombination centers.

400 °C Higher temperatures facilitate crystallization in full CdTe and boost optical properties. However, it is important to take care not to cause the material from degrading.

The higher temperature was typically needed to allow CdTe films to crystallize fully and improve their optical properties. As higher temperatures for annealing, promote grain boundary reduction, as well as better inter-grain connection. However, temperatures that exceed 400 °C could cause material degradation especially for CdS due to sublimation or changes [43]. So, annealing at temperatures of 400°C allows for a compromise between enhanced crystallinity and preserving film integrity throughout multiple layers.

Result and Discussion

To enable electrical, structural, and optical characterization, CdS (Cu)/ZnSe and CdTe/CdSe multilayers are annealed at different temperatures in a vacuum. Using an IV curve analysis at various annealing temperatures, the resistivity of each individual compound (CdTe, CdS, ZnSe, and CdSe) and multilayer (CdS (Cu)/ZnSe and CdTe/CdSe) is evaluated. Furthermore, "Panalytical Xpert' Pro (Cu k-α 1.54Ả) is used for X-ray diffraction on each unique film, after which the crystal size is calculated.

Structural Analysis

The X-ray diffraction technique was utilized to clarify the planes and crystalline structure of the multilayer thin films. The XRD system "Panalytical Xpert' Pro" (placed at CIIT Islamabad) was used to analyze the produced samples, which included CdS (Cu)/ZnSe and CdSe/CdTe multilayer thin films. X-Rays Cu (kα), a wavelength of 1.5406 Å, and a diffraction angle spanning from 20° to 80° are the main characteristics of the XRD apparatus used in our investigation.

The deposited sample's X-ray diffraction (XRD) traces are shown in the picture. Through information on average crystalline size and phase identification, the XRD spectrum results provide important new insights into the multilayer CdTe/CdSe thin films. The pattern's peaks resemble tiny spikes, and the spreading of the peaks is ascribed to microscopic crystal sizes [27]. In accordance with [JCPDS-89-3011], the most notable peak appears at about 24.5°, indicating the presence of CdTe. Its corresponding planes are designated as (111). Similarly, the peak at 25° corresponds to CdSe and is identified with (100) planes, matching [JCPDS-88-2346]. Notably, the XRD spectra of the multilayer heterostructure show the peaks of both materials, CdTe and CdSe, confirming their presence with quartzite and zinc mix structures, even though CdTe is the bottom layer and CdSe is the top layer. The reference [28] and the XRD patterns show perfect agreement. For the multilayer with a thickness of 252 nm, the average crystalline size is roughly 4.01 nm.The multilayer was then heated in a furnace to 250˚C and 350˚C for annealing after deposition. The spectra of the annealed samples showed that higher annealing temperatures increased the peak intensity. For example, the spectra of CdTe (JCPDS-89-3011) showed a peak at approximately 25° referencing the (100) plane, and for CdSe (JCPDS-88-2346) with a quartzite structure, the peak intensity increased. This intensification is explained by the multilayer thin films' increased crystallinity as the annealing temperature rises. Debye-Scherrer formula was used to determine the crystallite size:

In this equation, β represents the FWHM of the peaks, λ denotes the X-ray wavelength, and θ represents the Bragg diffraction angle. K is the constant, with a value of 0.9. Using a formula, the micro strain (ε) was determined.

Using the formula, the length of dislocation lines per unit volume of the crystal is known as the dislocation density (δ).

The relationship a = d (h2+k2+l2), where h, k, and l are the Miller indices, can be used to get the lattice parameter "a."

The value of the number of crystallites per unit area (N) can be estimated with the use of the following formula.

We can get the number of crystallites per unit area (N) by changing the variables of thickness (t) and average grain size.

The CdTe/CdSe that has been deposited on an ITO-coated glass substrate and annealed at As Deposited, 2500C, and 3500C are designated as X, Y, and Z in the Figure 4.

In Figure 5 X-ray diffraction (XRD) spectra of the annealed multilayer CdS (Cu) /ZnSe, thin films on glass substrate show that the peak intensity increases as the annealing temperature rises. This is explained the fact that the annealing procedure increased the multilayers' crystallinity, or crystallization strength, which intensified the peaks that were seen. Significant changes in the peak positions are also noticeable. The conventional XRD patterns of cubic zincblende CdS [JCPDS # 75-1546] are constant with the orientations of the diffraction peaks, which show a pattern at specified angles and correspond to the (111), (200), (220), and (311) planes. The diffraction pattern found in the samples with quartzite hexagonal and cubic crystal structures—both of which have the same d-spacing structures—aligns with reference cards for CdS and ZnSe [JCPDS-00-010-0454] and [JCPDS-00-005-0522], indicating the presence of both CdS and ZnSe. According to the XRD data, CdS(Cu)/ZnSe is a polymorphic compound that can exist in hexagonal structures that are either cubic or quartzite-like [46,47]. The annealing temperature, the annealing substrate, flaws and imperfections, texture, and impurities are some of the variables that affect this polymorphism. Different temperatures—250°C, 300°C, and 400°C—designated as A, B, C, and D, respectively, were used to investigate the effects of annealing temperature. A represents the sample in its unannealed form in this instance, the annealed sample by B at 2500C, the annealed sample by C at 300°C, and the annealed sample by D at 400°C. A Box Furnace (KSL 1200X) was used for the annealing procedure.

A UV-VIS spectrophotometer (Hitachi U-4001) operating in the 400–2500 nm wavelength range was used to analyze multilayer thin films of CdS (Cu)/ZnSe and CdTe/CdSe that were formed on glass substrates. The transmittance spectra were evaluated in the wavelength range of 450 nm to 2500 nm, with particular attention to the CdS (Cu)/ZnSe findings. In the as-deposited samples, a notable decrease in transmittance was seen below 798 nm, which is followed by a declining fall at 738 nm, 575 nm, and 533 nm upon annealing, suggesting high absorption in those locations. A wavelength increase is correlated with an increase in transmittance, as Figure 10 illustrates. The multilayer exhibits prospective uses in laser diodes (LDs), light-emitting diodes (LEDs), and solar devices, as evidenced by its transmittance ranging from 70% to 80% in the visible region beyond 798 nm [31]. The optical consistency of the produced nanoparticle films was confirmed by the constantly oscillating minima and peaks at different wavelengths. The total transmittance is largely constant even if interference fringes get more intense during the annealing process at 250°C, 300°C, and 400°C. A visible shift in the absorption edge towards higher wavelengths is observed, which leads to a reuction in the CdS(Cu)/ZnSe thin film's band gap [48]. The optical bandgap values that are derived using UV-Vis spectrum (e.g., ~2.42 eV for CdS and ~1.45 eV for CdTe) are in line with the values reported in previous research. For example, Smith et al. (2020) have reported similar reductions in bandgaps during an annealing process that resulted in improved crystallinity as well as lower defect densities. The tuning of the bandgap observed here indicates that these films may be ideally suited to solar cell applications where engineering of bandgaps is essential to maximize the efficiency and absorption of light.

Using tauc equation to calculate the bandgap of multilayer thin film.

The reflectance of the multilayer was calculated using the transmission and absorption data. The figure makes it evident that the reflectance is lower than the transmittance and absorption spectra, indicating that the CdS (Cu)/ZnSe multilayer heterostructure is suitable for the window layer in solar cells.

The reflectance value can be determined by applying the formula R+T+A=1. As expected, multilayer CdS (Cu)/ZnSe thin film reflectance is declining and eventually gets very tiny in the visible range (Figure 12). The most expected wavelength ranges for the realization of visible laser diodes (LD) and efficient light-emitting diode (LED) displays, etc., were those with very small reflectance and absorbance values in the visible area, between 400 and 700 nm.

The ITO-coated glass substrate is the substrate for the second multilayer heterostructure of CdTe/CdSe multilayer. Additionally, it was subjected to optical characterization using a UV-VIS spectrophotometer (Hitachi U-4001) with a wavelength range of 400–2500 nm. While the conduction band of CdTe and CdSe is isotropic and contains elements from semiconducting groups II–IV, the valance band primarily consists of telluride and selenide anions [49]. Transmission is depicted in Figure-13, and the combined graph in Figure-14 shows a clear shift in the absorption edge of the multilayers CdSe/CdTe from 830 nm to 1050 nm due to the annealing temperature [50]. Which is mentioned as A (valance band with symmetry of (γ9), B (valance band with symmetry of (γ8), and C (valance band with symmetry of (γ7) [51] Degenerate bands of semiconductor excitations are also covered [52]. Since all likely electronic excitations occur between the valance and conduction bands of CdTe and CdSe, it is evident that CdTe/CdSe exhibits type II band alignment [53]. The energy produced as a result of these excitations is less than the bandgaps of CdSe and CdTe and is non-quantized. These excitations were moved to higher levels when the grain/particle size shrank. The absorption spectra of CdTe/CdSe showed the appearance of infrastructures due to electronic excitations caused by the energy levels of electrons and holes [54]. The separation of the CdTe valance band into its two components (γ7) and (γ8) was caused by spin orbital interactions. Equation 5 connection was used to compute the bandgap, also known as the excitation energy, which is the space between the two bands of CdTe/CdSe.

The multilayer heterostructure annealing process will result in changes to the band gap between the conduction and valance bands. The observed bandgap values are (2.4ev, 2.1ev). When the sample is annealed at 2500C, the bandgap values decrease (2.2ev, 1.94ev), and at 3500C, the bandgap values (2.08ev, 1.45ev) are displayed in Figure 15. It is evident that the bandgap values were higher than those of bulk CdTe (1.54ev) and CdSe (1.7ev). The findings indicate that confinement energies (E-Eg bulk) are the reason for the multilayer's stickiness in quantization [55].

The wavelength-dependent extinction coeffcient (K) is represented in Figure 12. Figure indicates that the CdTe/CdSe multilayer heterostructure has the best surface smoothness and is highly transparent, with the extinction coeffcient value falling between 800 and 1400 nm. Using the formula R+T+A=1, one may determine the reflectance of multilayer CdTe/CdSe. As seen in Figure 13, the CdTe/CdSe multilayer's reflection is smaller than its transmittance and absorption.

An analysis of a system's rotational, vibrational, and other low-frequency modes could be done using a Raman spectroscopy. The intended range of 100 cm-1 to 2000 cm-1 was reached in the room temperature Raman spectra. The room temperature Raman spectrum of the CdS (Cu)/ZnSe multilayer heterostructure is display in Figure 5.8. It shows the optical absorption peaks (Raman shifts) at 238 cm-1, 289 cm-1, 470 cm-1, 591 cm-1, 885 cm-1, 1081 cm-1, and 1752 cm-1. These are the longitudinal optical phonon modes 1LO and 2LO of CdS (Cu) and ZnSe. When the multilayer is annealed, the LO mode's peak position shifts from 236 cm-1 to 240 cm-1 when annealed at 2500C. The peaks are shifted to 243 cm-1and 300 cm-1 at 3000C and 4000C with a parallel increase in the full-width at half-maximum (FWHM), and the intensity of the peaks also increases with annealing temperature [56]. The energy of this should be near to the optical band gaps where the modes that showed in the Raman spectra—surface optical (SO) and longitudinal optical (LO) modes, respectively—as the 1LO band is the most prominent in the Raman spectrum produced by the 325 nm laser. Multilayer structure spectra show a noticeable broadening of the LO modes. The density of phonons on current states is another factor contributing to the frequency of LO modes. In order to examine how annealing affects the Raman shift, Figure 18 displays the Raman spectra of the CdS (Cu)/ZnSe multilayer heterostructure as it was deposited as well as the spectrum of the annealed sample. The following table [57] contains a list of all potential Raman peaks for CdS, ZnSe, CdTe, and CdSe. Raman spectrum revealed distinct peaks, which correspond to phonon modes in the materials and further confirmed their crystallinity. This finding was consistent with those reports and they found similar sharpening of the peak and increased intensity after an annealing process, indicating a decrease in disturbance within CdTe films. Contrary to this to the Raman payoff that are presented in this study prove that annealing does not just improve structural order, but also improves the quality of the material that is essential to minimize recombination losses in optoelectronic devices [58].

The Raman shift can be calculated by using for- mula

Figure-16 displays the relationship between the Raman spectra and the XRD calculations (crystal size). The Raman bandwidth has a positive correlation with temperature and crystal size (D). The little particles are mixing to generate larger particles, it is concluded. Using the FWHM of the XRD, one may determine the Raman bandwidth from the Raman spectra. An additional FWHM of Raman peaks is the Raman band width [59].

The room temperature Raman spectra of the CdTe/CdSe multilayer heterostructure are displayed in Figure-17, with peaks (Raman shifts) at 180 cm^–1, 541, 1092 cm^–1, and 1426 cm^–1 [60]. These are CdTe and CdSe longitudinal optical phonon modes (1LO and 2LO), and when we anneal the multilayer, the LO mode's peak position moves from 200 cm^–1 to 240 cm^–1. The peaks shift to 243 cm^–1 at350^oC after being annealed at 250^oC, and the full-width at half-maximum (FWHM) increases concurrently. The intensity of the peaks likewise increases as the annealing temperature rises [61]. The CdTe/CdSe multilayer heterostructure was annealed at 250^oC and 350^oC in a furnace. As we can see, annealing enhanced the peak's strength and caused some peak shifting.

The annealing temperature of CdTe/CdSe multilayer heterostructure is 250⁰C, 300⁰C and 400⁰C plotted vs Raman shift. Figure-18 shows that the temperature increase is directly related to the Raman shift.

The photoluminescence (PL) spectrum of CdS (Cu)/ZnSe multilayer layer thin films that were made on ITO-coated glass substrates and lit at 325 nm is displayed in Figure 6. This shows the visible region's 350–405 nm range of excitation recombination and emissions. Peak intensity is rising becauseof annealing. Annealed multilayer thin film PL spectra in Figure-20 exhibit peaks at 356 nm, 79 nm, 388 nm, 395 nm, 397 nm, 403 nm, and 417 nm, in that order.

The band emission and the observed peaks are relatively close.The PL peaks at 379 and 395 nm in all multilayer thin film samples indicate the blue shift when using a wavelength of 325 nm [62]. The PL peak is located nearer the absorption edge, indicating that in multilayer thin films, band edge recombination is connect to luminescence. These findings enhanced the photoluminescence of bilayer thin films and validated the true distribution of ZnSe and CdS surface states [63]. Because of this, these multilayer heterostructure are consider as the best for use in solar cell applications.

Both the CdTe and CdSe peaks are clearly visible in the multilayer samples, as seen by the splitting of the PL spectra of the CdTe/CdSe multilayer heterostructure in Figure-21. Because of excitation splitting, the emission peaks at a maximum between 359 and 412 nm in wavelengths. The mission energy is dependent on the band alignment of the two materials (lower band gap materials and high band gap materials), resulting in a lower observed energy of emission that is also lower than the energy ban gap (E.g.) of both materials. Thus, by adjusting thickness and temperature, the CdTe/CdSe multilayer heterostructure causes the energy band gap to shift from the visible to the near-infrared region [64].

The Hall Measurement system measures electrical qualities including conductivity and resistance. At 300 K room temperature, multilayer thin film electrical characteristics are measure. Using ITO-coated glass substrates as the back contact, a multilayer heterostructure was deposit. The Schottky diodes were formed by evaporating CdS (Cu) and leaving Au and Ti as a contact at the third and fourth positions. We doped a few nanometers of copper (Cu) onto CdS because, as we know, CdS (Cu) behaves as a P-type material by nature. However, CdS is an N-type material until metal doping converts it to a P-type conductivity [65]. The P-type character of CdS (Cu) is demonstrated by its conductivity, which we evaluate using the hot probe method [48]. In PN junction of CdS (Cu)/ZnSe multilayer heterostructure ZnSe shows N-type behavior [66].

Current voltage characteristics were obtained by connecting the positive probes of the 220 Current Source to the back contact and the negative probes to the positive contact in order to investigate the rectifying behaviors of the contacts at room temperature (IV). The sample for several constant currents was checked, as the voltage dips across. THe differences in exponential current and voltage were displayed by these heterostructures. Evaporating gold and titanium contacts over ITO/CdS(Cu)/ZnSe structures and the reported current voltage characteristics, however, justified the purpose of the observed Ohmic behavior for the ITO/CdS(Cu)/ZnSe/Metal (Au/Ti) heterostructure [67]. ITO/CdS(Cu)/ZnSe circuit would be rectifying rather than Ohmic, according to literature studies, since indium oxide's (ITO) work function can rise [50] with CdS oxidation [68]. Current voltage measurements were obtained in the temperature range of 500C to 4000C in order to investigate the current transport process of Schottky diodes with Au and Ti. Figure 22 illustrates the relationship between temperature and idealism factor. ITO/CdS (Cu)/ZnSe/Au/Ti operates as a multilayer heterostructure at lower temperatures and as temperature rises, it exhibits the characteristics of a Schottky diode. By increasing the temperature, the resistance of the heterostructure decreases and the PN junction exhibit Ohmic behavior [69]. Further raising the temperature caused the heterostructure resistance to fall, and the PN junction exhibited Ohmic behavior, allowing the current o flow straight to the junction [70]. At V=0, the extrapolated straight line of the current (I) verses voltage (V) curves interrupts, indicating saturation currents. Upon investigating the conductivity of CdS (Cu) and ZnSe after annealing it was observed that conductivity was not changed due to annealing and is given in Table-4 and 5.

ITO-coated glass substrate, which served as a back contact, was coated with a multilayer heterostructure of CdTe/CdSe. The Schottky diodes were formed by evaporating CdTe/CdSe and placing Au and Ti as a contact at the third and fourth positions. The current voltage characteristics between ITO and Au/Ti/CdSe contact were recorded because, as we know, CdTe is inherently P-type [53] and CdSe is naturally N-type [71]. Figure 23 depicts the dark current–- voltage properties of the Au/Ti/CdTe/CdSe/ITO/glass structure. The I-V properties of the Au contacts on the CdTe films demonstrated the anticipated rectifying behavior [72]. At substantial forward bias, a long series resistance result is observed. With the numerous defects indicated by the CdTe carrier concentrations discovered by Schottky barrier research, this behavior remains consistent. The ability to deposit a p-n junction by creating a CdSe thin layer on top of an n-type CdSe film was validated by the current vs. voltage characteristics displayed in Figure-23 [73]. The annealing temperature has no effect on the conductivity of thin coatings.

Conclusion

This study describes the use of the resistive thermal evaporation method to the production of multilayer heterostructure of CdS (Cu)/ZnSe and CdTe/CdSe. The band gap energies of bulk CdTe (1.5eV) and CdSe (1.9Ev) are significantly larger than the excitation energies of multilayer heterostructure, which were found to be between (2.4Ev and 2.1eV) in the as-deposited sample of CdTe/CdSe. After annealing, they reach (2.2ev and 1.94Ev) at 350oC (2.08 and 1.45). The red shift in the CdTe/CdSe multilayer heterostructure emission peak has been verified. The optical properties of CdTe/CdSe have been found to exhibit quantum confinements. The band gap abruptly shifts from the visible to the near infrared range, especially for elements like selenium and tellurium. The X-ray diffraction (XRD) results of multilayer thin films of CdTe/CdSe exhibit both CdTe and CdSe peaks in the spectra; the bottom layer, CdTe, is visible as a strong peak at position 23, indicating flawless deposition of all six layers. The CdTe/CdSe planes are (111) and (100), cubic and hexagonal planes, and the CdS (Cu)/ZnSe planes are (111), (200), (220), and (311), as determined by the X-ray diffraction (XRD) method. The XRD peaks in both ML heterostructure showed an increase in intensity as the annealing temperatures were raised. Analysis of the Raman spectra of all the samples of the CdS(Cu)/ZnSe multilayer heterostructure revealed that the FWHM of the LO band varies from 238 cm-1 to 1752 cm^-1,while the CdSe/CdTe ML heterostructure revealed peaks that fall between 180 cm^-1 and 1426cm^-1. A strong (111) orientation and enhanced film crystallinity are indicated by the presence of 2LO and 3LO phonon peaks in the Raman spectra.

In summary, we find that one of the key factors contributing to quantum confinements in multilayer heterostructure is the thickness of each sublayer, and that FWHM depends on size, which varies as particle size does. More research will be aided by the type I and type II band structures of multilayer thin films, which are employed to show how the tunneling action causes inter band coupling between quantum dots. The characteristics of many junctions in the heterostructure are confirmed by electrical properties, and the junction exhibits both Ohmic and Schottky behaviors.

Acknowledgments

We are thankful to National Institute for Laser and Optronics (NILOP), Islamabad, Pakistan specially (Director NILOP) for providing an opportunity to Hazara university Manshera students for doing experimental research in NILOP Pakistan. Further, we like to express our appreciation to Dr. Arshad Mahmood, (Head of Material division NILOP), Dr. Attaullah shah (NILOP) Ms. Farzana Majid, and Dr. Zahid Ali (NILOP). We are also thankful to the CIIT Islamabad and NCP, PIEAS ISLAMBAD for providing research facilities.

Funding

College of Earth and Planetary Sciences Chengdu university of Technology Chengdu 610059.

Data Availability Statement

Data is available with the 1st author of this paper.

Conflicts of Interest

The authors declare no conflicts of interest.