Tables at a glance

Table 1

Table 2

Table 3

Figures at a glance

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Table 1

Resources

Available

Techniques

CDF 9/7

SHPS

EHPF

Available

Percentage

Available

Percentage

Available

Percentage

Number of
register slices

15360

2164

14%

1185

7%

2023

13%

Number of Slices Flip Flops

30720

1454

5%

828

2%

1294

4%

4-LUTS

30720

3624

11%

1926

6%

3464

11%

Number of DSP

192

15

7%

10

5%

11

7%

Number of IOBs

448

51

11%

43

9%

51

11%

Table 1 : Consumed hardware resources

Table 2

	CDF 9/7	EHPF	SHPS
Maximum frequency (MHZ)	84.954	109.792	105.361
Used memory (kilooctets)	330264	325848	305560

Table 2 : The used memory and the estimated work frequency

Table 3

	XC4VSX35-10FF668		XC5VLX330-2ff1760		XC3S1600e-5fg320
	Used	Percentage	Used	Percentage	Used	Percentage
IOS	59	13%	59	4%	59	23%
Number of slice LUT	3542	23%	5197	2%	5370	36%
Maximum frequency (MHZ)	109.792	-	155.457	-	95.955	-
Number of 4- LUTS	2813	9%	-	-	9976	33%
DSPs	10	5%	10	5%	-	-

Table 3 : Hardware performance comparison.

FIGURE 1

Figure 1: The basic architecture for IoT sensor data processing, data fusion and data analysis

FIGURE 2

Figure 2: Taxonomy of data fusion strategies

FIGURE 3

Figure 3: Two-level decomposition algorithm for 2-D DWT

FIGURE 4

Figure 4: The implementation of the 1D-DWT lifting scheme

FIGURE 5

Figure 5: The schematic of 1-D DWT using lifting scheme for (9, 7) filter

FIGURE 6

Figure 6: Two-level decomposition algorithm for SHPS technique

FIGURE 7

Figure 7: Two-level decomposition algorithm for EHPF technique

FIGURE 8

Figure 8: The block diagram of the proposed 2D-DWT architecture

FIGURE 9

Figure 9: The block diagram of the proposed SHPS architecture.

FIGURE 10

Figure 10: The block diagram of the proposed EHPF architecture

FIGURE 11

Figure 11: 1D-DWT architecture block diagram

FIGURE 12

Figure 12: Each Lifting Computation's basic architecture

FIGURE 13

Figure 13: Internal buffers structure for: (a) (9, 7) filter; (b) SHPS technique; (c) EHPF technique

FIGURE 14

Figure 14: 14: Schematic Diagram of Image Fusion. (a) Image Fusion-based DWT; (b) Image Fusion-based SHPS; (c) Image Fusion-based EHPF

FIGURE 15

Figure 15: The intelligent monitoring system-based approach

FIGURE 16

Figure 16: Flowchart of EEWIFT

FIGURE 17

Figure 17: The block diagram of the proposed EEWIFT

FIGURE 18

Figure 18: Visual results of fused image. (a) Input source image1 (b) Input source image2 (c) CDF 9/7-based fusion: PSNR= 16.52 dB; (d) EHPF-based fusion: PSNR = 13.88 dB; (e) SHPS-based fusion: PSNR= 12 dB

FIGURE 19

Figure 19: Power consumption comparison between CDF 9/7 DWT and proposed approaches